External Interrupts

© 2003 by Charles C. Lin. All rights reserved.

Introduction

Compared to the speed of CPU or even of memory, I/O devices are considered extremely slow. Printers, keyboards, mice are all very slow devices. They take a long time to respond, and furthermore, they only require occasional handling by the CPU. Even though you may feel you're using the keyboard or mouse all the time, the CPU runs so much faster than you can, that it's practically as if you're not using it at all.

One way for a CPU to communicate with an I/O device is through polling. That's discussed in a different set of class notes .

However, if the device is slow, and rarely requires servicing, external interrupts are usually a better way to go.

This way of handling I/O devices usually called interrupt driven I/O.

A CPU usually has at least one input pin devoted to interrupts. Whenever a device wants the CPU to pay attention, it sends a a signal to this pin.

The protocol usually runs like this:

  1. I/O device sets the INT pin from 0 to 1.
  2. The CPU completes the current instruction, and then saves the state of the program. For older ISPs, this involved copying registers to the stack. For newer ones ISPs, this usually means switching to a supervisor (operating system) set of registers.
  3. The CPU then determines which kind interrupt has occurred. It can send a signal to the I/O device to ask for an interrupt number.
  4. The I/O device can place the interrupt number on the data bus.
  5. The CPU then runs an interrupt handler (a special function) for that.
  6. Once the interrupt has been handled, the I/O device turns the INT value back to 0, and the CPU resumes running the program that was interrupted.

For Intel CPUs, the address of the interrupt handler was placed at 4 x interrupt handler number. Thus, if interrupt 3 occurred, you went to address 12ten. At that address was the address of the handler. The CPU would then jump to that address and run the code.

By placing handler addresses at well-known locations, programs could replace the default handler with their own handler. Thus, if you had a special interrupt handler for interrupt 3, you could go to address 12, and place the address of your handler, overwriting the previous one (usually, the old handler's address is saved, and then when you're done with yours, you put back the original handler's address).

Basically, a handler is just a subroutine. The only difference is privileged access to certain addresses that only the operating system can access. Other than that, it behaves very much like a subroutine.

Interrupt Handling Devices

With many different I/O devices that can interrupt the CPU, it might be good to have a dedicated device that handles the management. Again, older PCs used a device called a PIC (programmable interrupt controller). I/O devices are hooked up to the PIC, and the PIC is the only device that sends the interrupt.

PIC allows devices to be prioritized, and thus higher priority devices can interrupt over lower priority devices. Some CPUs directly support priorities. For example, not only can you interrupt a Motorola 68000 CPU, you can also tell it what level priority the interrupt is (from 0 up to 7).

Blocking Interrupts

At times, the CPU may wish to ignore any interrupts. So, it may do this. That is all.

Software Interrupts

Software interrupts are essentially function calls to the operating system. They can call the same handlers that external devices call.

The main difference is just a matter of when software interrupts can be called. A software interrupt is usually just a special instruction that's called. You can inspect the code in memory to find when these interrupts can occur.

An external interrupt can basically happen anytime, and there's some hardware support for it (mostly via the INT pin).

Summary

External interrupts are a mechanism for I/O devices that communicate infrequently with the CPU to get the attention of the CPU. Rather than have the CPU constantly check to see if the I/O device needs attention (this is polling), the device interrupts the CPU.

There's a protocol between device and CPU that allows the device to indicate what kind of service it wants from the CPU. Usually, this is done using an interrupt number. The CPU then locates an interrupt handler based on this number, runs the code for the handler, and tells the device it's done.

Dealing with I/O devices can slow down the CPU a lot because devices are often as slow as hard drives, in response time. However, such interrupts are infrequent, so the CPU only has to manage the interrupts when needed.

At this point, you should know what an external interrupt is, and be able to summarize the protocol between the CPU and the interrupting device.

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