ISA and ISP

Interface and Implementation

Perhaps the most important concept in all of programming is abstraction. Usually abstraction consists of two parts: an interface, which is the "abstraction" or view of the world that you want to present to the user and implementation which is how you implement the interface.

While these concepts are often associated with software, they can also apply to hardware. In particular, there are two concepts in hardware: instruction set architecture (ISA for short) and instruction set processor (ISP for short).

ISA is a kind of hardware interface, while ISP is the hardware implementation.

ISA

ISA is a fairly recent term, only having been coined and used in the last few years. Before that, some people would simply call it assembly language. The notion of ISA is a little more complicated than that. The term that people used to use before ISA was simply, architecture. However, when most students here the word "architecture", they associate it with the physical chip, i.e., with silicon and transistors. Thus, it was renamed ISA to emphasize the notion of "instruction set".

ISA consists of the following:

The instruction set
The instruction set consists of the format of the instruction (in binary) and the semantics of the instruction (i.e., what does the instruction do). The semantics include the kinds of way to access and maneuver data (called addressing modes).
The register set
Instructions work on registers and memory. On RISC architectures, they primarily work on instructions. The register set defines which registers the instruction may access. Registers have names (nothing fancy, MIPS uses register names such as $r0, $r1, ..., $r31).

The ISA represents the view of the computer as seen by an assembly language programmer.

Even though that may seem very "concrete" (as opposed to very abstract), this represents an interface. The ISA programmer sees the computer as outlined by the ISA. The ISA is effectively a specification for a computer.

ISP

The ISP is an implementation of the ISA. Real architectures use cache and pipelines to make the programs run quickly. However, the ISA programmer doesn't need to know that caches and pipelines exist.

There may be different implementations of a particular ISA. For example, IA32 is a 32 bit ISA (it's Intel's main ISA). Intel P4 and AMD Athlon series are implementations of this ISA. Their ISPs are quite different (different pipeline lengths, etc.), but they both run the same code and are semantically equivalent.

Some authors make a further distinction saying that given a particular ISP, there are different realizations of ISPs, but I won't make that fine a distinction.

The point is that, for a given program written in a given ISA, there are many kinds of ISPs that will run that program.

A List of ISAs

Here's a list of ISAs: IA32, IA64 (32 and 64 bit Intel Architecture), Sun Sparc, DEC Alpha, MIPS R2000/R300, ARM. Some of these are actually families of ISAs. That is, they are a collection of similar ISAs (usually, later generations of each other, but occasionally completely different).

Designing ISAs

One common thought is "why isn't there just one ISA?". You would have thought, perhaps they would decide on a nice clean ISA, and be done with it. After all, ISAs generally resemble one another. Usually, it's not too hard to program in different ISAs.

The design of ISA is outside the scope of this course, but it is something to think about. Consider that the more the ISA specifies (for example, if the assembly language programmer can manipulate the cache), the more constraints it places on the ISP. This may mean that you can't optimize the hardware as much, because you're forced to implement the ISA.

This is mostly to make you aware that people do try to design ISAs, though no one has created a definitive ISA.

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